Integrated Circuits, Systems-on-Chip, Electronics and Embedded Design Research Laboratory (IC-SEED)

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Research Areas

Processor Architectures and RISC-V

1. Processor Architectures and RISC-V

  • Design of microprocessors based on the open-source RISC-V instruction set architecture
  • Application-specific customization and extension of processor cores
  • Integration of custom hardware units into processors (data filtering, arithmetic units, etc.)
  • Lightweight processor cores for embedded and IoT applications
Hardware Accelerators

2. Hardware Accelerators

  • Design of application-specific hardware accelerators for various purposes, integrated with processors and efficient in terms of speed, area and power
  • Lightweight cryptography hardware accelerators for IoT devices
  • Artificial intelligence and neuromorphic computing accelerators (spiking neural networks – SNN)
  • Hardware units for signal processing applications
  • Verification of accelerators and comparison in terms of speed, area and power
FPGA-Based Digital Design

3. FPGA-Based Digital Design

  • Digital system design with hardware description languages (Verilog/VHDL)
  • Prototyping and system implementation on FPGAs
  • Hardware/software co-design
Embedded Systems and the Internet of Things (IoT)

4. Embedded Systems and the Internet of Things (IoT)

  • Microcontroller-based hardware and software development
  • Integration of sensor and communication interfaces
  • Low-power embedded system design
  • IoT applications and edge device design
Circuits and Systems Theory

5. Circuits and Systems Theory

  • Analysis of nonlinear and chaotic systems
  • Modeling and numerical analysis of fractional-order systems
  • Analog electronic circuit realization of chaotic and hyperchaotic systems
  • Electronic circuit experiment sets for education
Integrated Circuit and System-on-Chip Design

6. Integrated Circuit and System-on-Chip Design

  • Analog and digital integrated circuit (IC) design
  • ASIC design flow
  • System-on-Chip (SoC) architectures and integration
  • Printed circuit board (PCB) design
Chip physical design and fabrication

7. Chip Physical Design and Fabrication (RTL-to-GDSII)

  • RTL-to-GDSII ASIC physical design flow (synthesis, placement, clock tree synthesis, routing)
  • Open-source EDA tools (Yosys, OpenROAD/OpenLane, Magic, KLayout) and open process design kits (SkyWater SKY130, GF180MCU, IHP SG13G2)
  • Design rule and layout-versus-schematic checks (DRC/LVS) and static timing analysis
  • Chip fabrication (tape-out) through multi-project wafer (MPW) programs and Tiny Tapeout, and testing and verification of fabricated chips